Jiayu Liu | HEAD Labhttps://verimaketest.github.io/author/jiayu-liu/Jiayu LiuWowchemy (https://wowchemy.com)en-usFri, 01 Aug 2025 00:00:00 +0000https://verimaketest.github.io/media/icon_hu0ab5c02c1f2ff27bbe76bf3235245d1a_922260_512x512_fill_lanczos_center_3.pngJiayu Liuhttps://verimaketest.github.io/author/jiayu-liu/FASE: An FPGA-Based Accelerator for Lightweight Sample Entropy With Monte Carlo Samplinghttps://verimaketest.github.io/publication/liu-2025-fase/Fri, 01 Aug 2025 00:00:00 +0000https://verimaketest.github.io/publication/liu-2025-fase/FPGA-based Approximate Multiplier for FP8https://verimaketest.github.io/publication/chen-2025-fpga/Thu, 01 May 2025 00:00:00 +0000https://verimaketest.github.io/publication/chen-2025-fpga/ATE-GCN: An FPGA-Based Graph Convolutional Network Accelerator with Asymmetrical Ternary Quantizationhttps://verimaketest.github.io/publication/chen-2025-ate/Sat, 01 Mar 2025 00:00:00 +0000https://verimaketest.github.io/publication/chen-2025-ate/